Archive for March, 2005

AMD and 90nm Manufacturing: Paving the Way for Tomorrow, Today

Monday, March 28th, 2005

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Processor manufacturers employ a number of techniques to improve the performance characteristics of their products. One of the most significant involves shrinking the lithography process used to manufacture processors, thereby reducing power consumption and surface area, resulting in increased production efficiency and increased potential for higher operating frequencies. AMD, using its highly efficient APM (Automated Precision Manufacturing) system, has already taken that critical step from its 130nm SOI (Silicon On Insulator) process to 90nm SOI, enabling the next generation of processors.

Shrinking a Die
Lithography, the printing process used to manufacture processors, is the most important factor in reducing the size of integrated circuits. When a device is said to have been manufactured at 90nm, that number corresponds to the International Technology Roadmap for Semiconductors’ (ITRS) definition of the minimum metal pitch (the smallest metal lines) used. According to the ITRS, DRAMs continue to employ the small metal pitch and therefore serve as the benchmark for defining process technology. Other technology features, such as transistor gate size, can be significantly smaller than that metal pitch measurement. For example, the
AMD Opteron™ and AMD Athlon™ 64 processors sport gate dimensions of roughly 50nm.

With such minuscule proportions, it’s easier to use millions upon millions of transistors in complex circuits. Those transistors are etched onto silicon, referred to as a die, during a complicated manufacturing process. And so, when new lithography technology debuts, the transistors that comprise an AMD Opteron or AMD Athlon 64 processor contract, reducing the size of the processor die in what’s aptly called a die shrink.

There’s a lot more to a processor die shrink than using new equipment to manufacture smaller transistors. Rather, it’s a delicate balance between replacing some tools, accelerating gate switching speeds, and improving yields. AMD achieves each of these goals in a different way, but the combined effect is a faster, cooler, and more efficient processor.

Of course, reducing a manufacturing process does require machinery capable of printing incredibly small structures. AMD is using a combination of 248nm and 193nm lithography tools, along with resolution enhancement techniques, to etch down to sub-50nm transistor gates. The smaller transistors are able to switch faster and simultaneously draw less power.

90nm transistors occupy less die space than transistors manufactured using a 130nm process, making it easier to add more features to the final product. AMD’s advanced 130nm process facilitated power management through Cool’n’Quiet™ technology, large on-die caches for accelerated performance, and the promise of 64-bit computing through extensions to the x86 ISA. Similarly, 90nm will enable exciting new technologies in the coming months, such as more advanced power management features that will extend battery life and the integration of two processing cores onto a single die to enhance performance.

One of the most prominent issues to overcome in employing 90nm lithography presents itself when transistor interconnects move closer together and current begins leaking through the insulating substrate material. Reducing operating voltages help combat this issue, and are indeed used on 90nm AMD64 processors, but a more effective countermeasure is required. Fortunately, AMD embraced SOI technology in its previous-generation manufacturing process and, after ironing out the complications, was able to apply SOI to its current 90nm efforts.

SOI effectively reduces the capacitive load for each transistor, improving circuit speeds and lowering power consumption, by building transistors on a layer of silicon situated above an insulating oxide layer. Using SOI and low-k dielectric materials, which also help cut back on signal crosstalk and current leakage, AMD sidestepped one of the most daunting roadblocks to achieving high yields at 90nm.

AMD’s 90nm Manufacturing Process
Because its 130nm process was designed with the eventual migration to 90nm in mind, AMD made its transition smoothly, implementing a limited number of modifications to guarantee optimal performance at the new manufacturing node. Like the 130nm process before it, 90nm employs copper interconnects, a Black Diamond low-k dielectric technology, and SOI, which combine to lend the architecture superior thermal characteristics.

Case in point: the AMD Athlon 64 3500+ processor, running at 2.2GHz on the 130nm SOI manufacturing process, employs a nominal voltage of 1.5V. Its maximum thermal design power is 89W and processor current is specified at 57.4A. That same processor, fabricated at 90nm, only needs 1.4V. Thermal design power drops to 67W and its current maxes out at 45.8A. Though thermal density correspondingly increases as the processor die shrinks, that’s to be expected. There aren’t any necessary motherboard revisions and existing cooling solutions work just as well on a 90nm processor as they did before.

AMD Athlon 64 processors centering on the 90nm manufacturing process are already available at retail. However, the transition is still in progress. AMD expects that approximately 50 percent of all eighth-generation wafer starts will be 90nm by the end of 2004. The rapid ramp-up will continue into 2005 across the mobile, desktop, server, and workstation segments. AMD’s current roadmap posits that all processors will be manufactured at 90nm midway through 2005.

One of the most significant factors contributing to AMD’s success with 90nm is APM version 2.0, the automated material processing approach used to maximize both quality and efficiency during manufacturing. Now, automating the way materials move within a Fab is nothing new; APM takes that a step further, though, by also automating the way decisions are made during the process. In short, it enables each tool in the manufacturing line to subtly adjust AMD’s master recipe according to information received from other equipment. The result is optimized yield for every lot of 25 wafers.

Even as AMD focuses attention on ramping up 90nm production, it’s already building another fabrication plant in Dresden, Germany, that will spearhead a push to 65nm manufacturing in 2006. Fab 36, as it is called, will handle 300mm wafers using the third generation of AMD’s APM methodology. APM 3.0 extends the yield control of its predecessor by gathering information about each processor die and adjusting the master recipe on a per-wafer basis. APM 3.0 provides a tighter integration of the process control systems with the other parts of the factory (active scheduling, predictive yield management, automated decision making etc.). The combination of 300mm wafers, 65nm manufacturing, and APM 3.0 promises to maximize manufacturing efficiency.

Until then, AMD will make further enhancements to its 90nm manufacturing process by adding strained silicon, increasing drive current by stretching the silicon atoms that comprise the channel region of each transistor.

Next Up: Dual-Core
The perpetual miniaturization of electronic circuits is certainly enabling exciting new possibilities. Beyond today’s AMD Athlon 64 processor lineup, there is a family of dual-core processors planned that center on the same eighth-generation architecture. The technology has already been publicly demonstrated using an HP ProLiant DL585 server with four physical socket interfaces and 90nm, dual-core, AMD Opteron processors.

AMD’s dual-core processors are being designed with today’s infrastructure in mind. System integrators will have no problem incorporating AMD Opteron processors into existing platforms and any desktop motherboard supporting a 90nm AMD Athlon 64 processor will accommodate dual-core descendants of the chip as well.

The seamlessness of AMD’s dual-core adoption is due to a couple of notable factors. One is 90nm manufacturing, which reduces power consumption to the point that putting two cores on one die is feasible, even though the task requires roughly 205 million transistors. And despite that extra functionality, the die size of a dual-core AMD Opteron processor will resemble its 130nm predecessor.

Another key ingredient is the micro-architecture’s design. AMD Opteron processors already feature the crossbar switch and system request interface needed to arbitrate between two cores. Thus, the addition of another processing core and cache repository is made much more elegant. And because both cores share a memory controller and HyperTransport™ technology resources, the processor’s pin-outs remain consistent with existing interfaces.

Conclusion
AMD’s experience manufacturing 130nm transistors using copper interconnects, SOI, and low-k dielectrics is paying off today in its rapid shift to 90nm. Not only do the 90nm processors boast improved power characteristics, but they are generally regarded as featuring better clock scalability as well. Consequently, AMD is in a strong position moving forward, as its low-power consumption numbers are an encouraging sign for the micro-architecture’s future.

With strained silicon already a part of the AMD Athlon 64 FX-55 processor, you can expect to see AMD making further adjustments to its 90nm process in the months to come, leading up to availability of dual-core processors scheduled for 2005. The completion of Fab 36 will culminate the life of 90nm as AMD shifts gears to 65nm manufacturing and begins tooling up for the eventual adoption of 45nm and beyond.

Overview of PCI Express, Technology Edge

Monday, March 28th, 2005

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Overview of PCI Express

PCI Express promises to remove long-standing bottlenecks to system performance, add some long-overdue features, and give much-needed revision to the layout of the typical desktop motherboard. Check out this exclusive overview of the next-generation board-to-board level interconnect.

The link below will take you straight to the article.

http://www2.amd.com/us-en/protected/Weblet…6_12221,00.html